1. Field of the Invention
The present invention relates generally to fin-type field effect transistors (FinFET) and more particularly to the method for forming an improved FinFET structure that includes multiple gate dielectric thicknesses.
2. Description of the Prior Art
Semiconductor structure includes both passive semiconductor devices such as resistors, as well as active devices such as transistors and diodes. Field effect transistor devices are common transistor devices within semiconductor structures.
Field effect transistor structure and device dimensions have been scaled effectively to increasingly smaller dimensions over the period of several decades. Various field effect transistor structures having desirable properties are known in the semiconductor fabrication art. One recent advance in transistor technology is the introduction of fin type field effect transistors that are known as FinFET.
In the conventional process, the method for forming individual FinFETs on one substrate comprises: first, a substrate having at least two fin structure is provided, and a first oxide layer is then formed on these two fin structures, next, parts of the first oxide layer, especially the portion that covers on one of the fin structure is then removed, afterwards, a second oxide layer is then formed on the exposed fin structure. However, since there is no other layer that is formed during the process, the fin structure or the isolating region surrounding each fin structure is easily damaged by the etching processes, influencing the yield and the performance of the FinFET.